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| data sheet 1 rev. 1.0 www.infineon.com/transceivers 2016-08-05 TLE8457 lin transceiver with inte grated voltage regulator 1 overview features ? single-wire lin transceiver for transmission rates up to 20 kbit/s ? compliant to iso 17987-4, lin specification 2.2a and sae j2602 ? 5 v or 3.3 v low drop-out linear vo ltage regulator with 70 ma current capability ? stable with ceramic ou tput capacitor of 1 f ? ultra low current consumption in sleep mode of max. 16a ? ultra low current consumption in standby mode: typical 20 a ? very low leakage current on the bus pin ? v cc undervoltage detection with reset output ? txd protected with dominant time-o ut function and state check after mode change to normal operation mode ? initialization watchdog with au tomatic transition to sleep mode ? bus short to v bat protection and bus short to gnd handling ? over-temperature protection and supply undervoltage detection ? very high esd robustness; 8kv according to iec61000-4-2 ? optimized for high electrom agnetic compatibility (emc); very low emission and high immunity to interference ? available in standa rd pg-dso-8 and leadless pg-tson-8 packages ? pg-tson-8 package supports auto mated optical inspection (aoi) ? green product (rohs compliant) ? aec qualified applications ? lin slave satellite modules ?window lifters ? rain/light sensors ? sun roof control modules ?wiper modules ? ambient lighting
data sheet 2 rev. 1.0 2016-08-05 TLE8457 lin transceiver with inte grated voltage regulator overview description the TLE8457 is a monolithic integrated lin transceive r and low drop-out voltage regulator. the device is designed to supply a microcontroller and peripher als with up to 70ma, provide protection through v cc undervoltage reset, while also offe ring bi-directional bus communication compliant to lin specification 2.2a and sae j2602. with the ultra low quiescent current consumption of typical 20 a in standby mode the TLE8457 is especially suited fo r applications that are perman ently supplied by the battery. based on the infineon bicmos technology the TLE8457 pr ovides excellent esd robust ness together with a very high level of electromagnetic compatibility (emc). the TLE8457 is aec qualified and tailored to withstand the harsh conditions of the automotive environment. type ldo v cc output voltage package marking TLE8457asj 5 v pg-dso-8 8457a TLE8457ale 5 v pg-tson-8 8457a TLE8457bsj 3.3 v pg-dso-8 8457b TLE8457ble 3.3 v pg-tson-8 8457b data sheet 3 rev. 1.0 2016-08-05 TLE8457 lin transceiver with inte grated voltage regulator 1 overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 table of contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3 pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3.1 pin assignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3.2 pin definitions and functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 4 functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 4.1 operating modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 4.1.1 normal operation mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 4.1.2 standby mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 4.1.3 init mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 4.1.4 sleep mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 4.1.5 bus wake-up event . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 4.1.6 mode transition via en pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 4.2 power supplies . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 4.2.1 power-up / power-down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 4.2.2 v s undervoltage detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 4.3 voltage regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 4.3.1 vcc undervoltage detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 4.3.2 reset output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 4.4 initialization watchdog . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 4.5 lin transceiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 4.5.1 txd time-out . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 4.5.2 short circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 4.6 over-temperature protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 5 general product characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 5.1 absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 5.2 functional range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 5.3 thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 6 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 6.1 functional device characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 6.2 diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 7 application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 7.1 application example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 7.2 esd robustness according to iec61000-4-2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 7.3 transient robustness according to iso 7637-2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 7.4 lin physical layer compatibility . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 8 package outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 9 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 table of contents data sheet 4 rev. 1.0 2016-08-05 TLE8457 lin transceiver with inte grated voltage regulator block diagram 2 block diagram figure 1 block diagram TLE8457_block_diagram control bus txd en v s r slave r en v cc 1 8 wake receiver over-temperature and over-current protection 4 driver 2 6 transmitter receiver rxd rf- filter bus v s / 2 3 gnd 5 linear regulator driver control time-out v cc undervoltage detection supply monitor 7 nrst v cc v cc current limitation bandgap reference v cc r nrst r txd data sheet 5 rev. 1.0 2016-08-05 TLE8457 lin transceiver with inte grated voltage regulator pin configuration 3 pin configuration 3.1 pin assignment figure 2 pin configuration 3.2 pin definition s and functions pin symbol function 1 v s battery supply voltage; decoupling capacitor required 2en enable input; integrated pull-down resistor logical ?high? to select normal operation mode 3gnd ground 4bus bus input / output; integrated lin slave termination 5rxd receive data output; monitors the lin bus signal in normal operation mode indicates a wake-up event in init mode 6txd transmit data input; integrated pull-up resistor logical ?low? to drive a dominant signal on the lin bus 7 nrst undervoltage reset output; integrated pull-up resistor logical ?low? during reset 8 v cc voltage regulator output; output capacitor requirements specified in functional devi ce characteristics pad ? connect to pcb heat sink area. do not connect to other potential than gnd TLE8457_pinning 1 2 3 45 6 7 8 v s 1 2 3 45 6 7 8 en gnd bus v cc nrst txd rxd v s en gnd bus v cc nrst txd rxd pg-dso-8 pg-tson-8 (top side x-ray view) (pad) data sheet 6 rev. 1.0 2016-08-05 TLE8457 lin transceiver with inte grated voltage regulator functional description 4 functional description 4.1 operating modes the operation mode of the TLE8457 is contro lled with the en and txd input pins (see figure 3 and table 2 ). the TLE8457 has 3 major operation modes: ?normal operation mode ?standby mode ?sleep mode additionally the TLE8457 has an init mode that is au tomatically entered when po wering up, detecting wake- up events or in case of malfunctions. figure 3 operation mode state diagram TLE8457_mode_diagram 1) wake-up source : rxd: logical ?high after power-up or reset rxd: logical ?low after bus wake-up detection 2) reset: nrst will stay ?low during ldo failures and for the reset time t rst normal operation mode lin transceiver: on ldo regulator: on en: high nrst: high sleep mode lin transceiver: off ldo regulator: off en: low nrst: low bus wake-up bus wake-up init mode lin transceiver: off ldo regulator: on en: low rxd: wake-up source 1) nrst: high 2) en initialization watchdog en 2 4 5 6 7 8 en and txd standby mode lin transceiver: off ldo regulator: on en: low nrst: high power-up en while txd = ?high 9 en 10 11 1 bus wake-up 12 3 v cc undervoltage v cc undervoltage recovery from over- temperature event on voltage regulator 13 data sheet 7 rev. 1.0 2016-08-05 TLE8457 lin transceiver with inte grated voltage regulator functional description table 1 operation mode transitions no. reason for transition comment 1power-on detection the v s supply voltage rise above the v s,pon power-on reset level 2 mode change with en input trigg ered by logical ?high? level 3 v cc undervoltage detection v cc output voltage fall below the reset threshold level 4 mode change with en and txd inputs triggered by logical ?low? level on en and txd 5 mode change with en input trigg ered by logical ?high? level 6 bus wake-up detection rxd set ?low? for signalling the bus wake-up event to the microcontroller 7 bus wake-up detection rxd set ?low? for signalling the bus wake-up event to the microcontroller 8 initialization watchdog timer elapsed forced transition to sleep mode because of no response from microcontroller after power-on, wake-up, reset or if local errors are preventing v cc to power up 9 mode change with en and txd inputs triggered by logical ?low? level on en while txd is held ?high? 10 mode change with en input triggered by logical ?high? level 11 bus wake-up detection rxd set ?low? for signalling the bus wake-up event to the microcontroller 12 v cc undervoltage detection detection of failure due to v cc undervoltage or recovery from an over-temperature event 13 recovery from ldo over- temperature event when over-temperature on the ldo is detected the TLE8457 is disabled. after recover the devi ce is activated in init mode table 2 operating mode control mode control functionality comments en txd v cc nrst rxd sleep low low off low floating ? init low high 1) 1) the txd input has a pull-up structure to v cc and is default set to logical ?high? if left open. on high 2) 2) nrst is logical ?low? during v cc undervoltage and while issuing a reset pulse to the microcontroller. low high rxd ?low? after a bus wake-up rxd ?high? after power-up or reset standby low high 1) on high high ? normal operation high low high on high low high rxd reflects the signal on the bus txd driven by the microcontroller data sheet 8 rev. 1.0 2016-08-05 TLE8457 lin transceiver with inte grated voltage regulator functional description 4.1.1 normal operation mode in normal operation mode both the voltage regula tor and the lin transceive r are active. the TLE8457 supports data transmission rates up to 20 kbit/s: data from the microcontr oller is transmitted to the lin bus via the txd input, while the receiver detects the data stream on the lin bu s and forwards it to the rxd output. after entering normal operation mode the TLE8457 requires a logica l ?high? signal for the time t to,rec on the txd input before releasing the data communication; the transmitter remain s deactivated as long as the signal on the txd input pin remains logi cal ?low?, preventing possible bus communication disturbance (see figure 4 ). from normal operation mode the TLE8457 can be set to standby mode or sleep mode. figure 4 entering normal operation mode, transition to sleep mode 4.1.2 standby mode standby mode is a low power mode with ultra low quiescent current consumption while the voltage regulator remains active, supplying for example a microcontroller in stop mode. no lin bus communication is possible, the transmitter and the receiver are disabled. the low po wer receiver is still active and the device can wake- up by a message on the lin bus. for changing the operation mode change from standby mo de to sleep mode, the device has first to be set in normal operation mode, th en in sleep mode (see figure 4 ). TLE8457_normal_mode standby mode normal operation mode sleep mode t mode,low t mode,high nrst v cc t to,rec t data transmission rxd data transmission txd t t en t t data sheet 9 rev. 1.0 2016-08-05 TLE8457 lin transceiver with inte grated voltage regulator functional description 4.1.3 init mode after a power-up event the TLE8457 enters init mode by default. in this mo de the lin transceiver is disabled, but the voltage regulator is switched on. following the linear voltage regulator has reached its nominal output voltage v cc and the nrst output set ?high?, the external microcontroller can change the mode to normal operation mode. if the initialization watchdog timer elapse s before a ?high? signal is detected on the en input, the TLE8457 will autonomously tr ansition to sleep mode (see ?initialization wa tchdog? on page 15 ). the initialization watchdog protection in init mode is al ways activated after starting up the voltage regulator and after a reset pulse, triggered by the nrst output going ?high?. in init mode the TLE8457 indicates wake-up informatio n on the rxd output. after a power-up and reset event, the rxd output will be ?high?. if th e TLE8457 is in init mode after bus wa ke-up detection, the rxd output will be ?low?. transitions to init mode can be controlled with the en input when in sleep mode, or automatic forced after: ? bus wake-up event on the bus pin. ? power-up event on the supply v s . ?power-on reset caus ed by the supply v s . ? voltage regulator failure event due to v s undervoltage. ? recovery of an over-t emperature event on the voltage regulator. figure 5 entering init mode after power-up TLE8457_init_mode init mode un-powered the device remains in init mode while the signal on the en pin is ?low v s,pon en lin v s normal operation mode rxd signals power-up rxd signals bus wake-up t wk,bus nrst v cc t rxd t t t t t data sheet 10 rev. 1.0 2016-08-05 TLE8457 lin transceiver with inte grated voltage regulator functional description 4.1.4 sleep mode sleep mode is a low power mode with quiescent curr ent consumption reduced to a minimum while the device can still wake-up by a message on the lin bus. both the transceiver and th e voltage regulator are switched off. 4.1.5 bus wake-up event a bus wake-up event, also ca lled remote wake-up, causes a transition from a low power mode to init mode. a falling edge on the lin bus, followed by a dominant bus signal for the time t wk,bus results in a bus wake-up event. the mode change to init mode becomes active wi th the following rising edge on the lin bus, when bus voltage exceeds v bus,wk . the TLE8457 remains in low power mode until it detects a state change on the lin bus from dominant to recessive (see figure 6 ). in init mode a logical ?low? signal on the rxd output indicates a bus wake-up event. in case the TLE8457 detects a bus wake-up event whil e already being in init, the wake-up event will be signalled with a logical ?low? level on rxd and override the previous wake source (see figure 5 ). figure 6 bus wake-up behavior TLE8457_bus_wake v bus v bus,dom v bus,wk sleep mode init mode t wk,bus txd is ?high because of internal pull-up structure rxd ?low indicates a bus wake-up event t rst v cc,uv,on t rxd t txd t en t nrst v cc t t data sheet 11 rev. 1.0 2016-08-05 TLE8457 lin transceiver with inte grated voltage regulator functional description 4.1.6 mode transition via en pin the en input is used for operation mo de control of the TLE8457. by setting the en inpu t logical ?high? for the time t mode,high while being in init mode or standby mode, a transition to normal operation mode will be triggered. if the voltage level at the en input is set logical ?high? while the TLE8457 is in sleep mode, a transition to init mode is initiated. if the en input is continuously held ?high? though powe ring up the voltage regulator and the following reset pulse, normal op eration mode will be entered. from normal operation mode the tle 8457 can be set to either sleep mode or standby mode. if the en input is set ?low? for the time t mode,low while the txd input is held logical ?h igh?, the mode will change to standby mode. for a transition to sleep mode, the txd must be set logical ?low? before the time t mode,low elapses after en goes ?low? (see figure 7 ). it is recommended to program a short delay time from en is set ?low? until txd is set ?low?, for preventing dr iving the bus dominant though mo de transition to sleep mode. the en input has an integrated pull-do wn resistor to ensure the device remains in a low power mode if the en input is left open. the en input has an integrated hysteresis (see figure 7 ). the TLE8457 changes the operation modes regardless of the si gnal on the bus pin. in the case of a short circuit failure between the lin bus and gnd, resulting in a permanent dominant signal, the TLE8457 can be set to sleep mode. figure 7 operation mode control the en input is blocked while the tle 8457 is in init mode and nrst is ?l ow?, no mode transitions to normal operation mode is possible while a re set pulse is issued. after the nrst output goes ?high?, mode control with the en input is released. at the same time th e initialization watchd og timer starts (see ?initialization watchdog? on page 15 ). note: if the TLE8457 is being forced to sleep mode by the initialization watchdog while the en input is externally being held at a logical ?high? level, the device will reinitiate init mode after the vcc voltage has been discharged below ~1 v. in such applications a dditional supervision means are recommended. TLE8457_mode_control normal operation mode en standby mode normal operation mode sleep mode txd v en,off en hysteresis t mode,high t mode,low t mode,low t mode,high v en,on nrst t rst t t t normal operation mode init mode data sheet 12 rev. 1.0 2016-08-05 TLE8457 lin transceiver with inte grated voltage regulator functional description 4.2 power supplies the TLE8457 is designed for being suppli ed by the battery line through an external reverse polarity protection diode at the v s pin (see figure 18 ). an input capacitor is needed for damping input line transients. 4.2.1 power-up / power-down during power-up the TLE8457 wi ll enter init mode when the v s supply reaches the power-on reset level v s,pon . the voltage regulator output v cc will track the v s supply voltage until v cc reaches its nominal voltage level. as v cc reaches the under-voltage level v cc,uvc , a reset pulse is issued, the nrst output will stay logical ?low? for the reset time t rst and then be set logical ?high?. as nrst goes ?high?, the en input will become active and the TLE8457 can change operatin g mode accordingly (see table 2 ). figure 8 power-up and power-down behavior while powering down the TLE8457 will block the lin transmitter if being in normal operation mode as the v s supply voltage falls below v s,uv,off . the voltage regulator will start tracking the v s supply voltage when falling below v cc + v dr . as v cc falls below the undervoltage level v cc,uv the nrst output will be set logical ?low? and the TLE8457 will enter init mode. when the v s supply voltage falls below the power-on-reset level v s,pon the voltage regulator will be disabled and the TLE8457 consid ered un-powered. TLE8457_vs_power-up_down un-powered v s v s,pon v cc v s v cc init mode normal operation mode v cc,uv init mode un-powered v s,uv,off v s,pon transmission blocked nrst t rst v s,uv,on t t v cc,uv en t data sheet 13 rev. 1.0 2016-08-05 TLE8457 lin transceiver with inte grated voltage regulator functional description 4.2.2 v s undervoltage detection figure 9 v s early undervoltage detection the TLE8457 has an undervoltage detection on the supply pin v s with two different thresholds: ? in normal operation mode the TLE8457 blocks the communicatio n between the lin bus and the microcontroller when detecting an ea rly undervoltage event. the rxd outp ut will be set ?high?. however, no mode change will occur. after v s rises above the undervoltage release level v s,uv,rel , the bus communication interface will be released when the signal on the txd input goes ?high?. see figure 9 . ? in case the power supply v s drops below the power-on reset level v s,pon the TLE8457 not only blocks the transceiver communication, it also changes the operation mode to init mode after recovery of v s , see figure 10 . in init mode the TLE8457 indicates a power-up event on the rxd pin. the power-on reset detection is active in all operation modes. figure 10 v s undervoltage detection TLE8457_vs_early_undervoltage_a power-on reset level v s,pon normal operation mode normal operation mode blanking time t blank,uv no communication possible undervoltage release level v s,uv,on undervoltage hysteresis v s,uv,hys v s undervoltage blocking level v s,uv,off t TLE8457_vs_undervoltage_a power-down normal operation mode init mode (en = low) normal operation mode (en = high) undervoltage hysteresis v s,uv,hys no communication possible t undervoltage blocking level v s,uv,off v s power-on reset level v s,pon blanking time t blank,uv undervoltage release level v s,uv,on data sheet 14 rev. 1.0 2016-08-05 TLE8457 lin transceiver with inte grated voltage regulator functional description 4.3 voltage regulator the TLE8457 has an integrated voltage regulator dedica ted for supplying microcon trollers and/or on-board sensors under harsh automotive environment conditions. it can supply a load current up to 70 ma with an output voltage tolerance within 2%. because of the ultra low current co nsumption, the tl e8457 is perfectly suited for applications permanently connected to the battery supply. addi tionally, in sleep mode, the voltage regulator is switched off and an even lower quiescent current can be achieved. the voltage regulator output is protected against undervoltage, over current, over-temperature and power-up failures. in case the load current rises ab ove the functional rang e, for example during v cc short circuits, the output current is limited to i cc,lim . therefore the v cc output voltage will drop and a reset pulse will be issued if falling below the undervoltage reset threshold. the v cc supply output provides a stable supply voltage with output capacitors down to 1 f, including low esr multi-layer ceramic capacitors. 4.3.1 vcc undervoltage detection the TLE8457 has undervoltage dete ction on the voltage regulator v cc output. if the v cc voltage falls below the undervoltage threshold v cc,uv for longer than detection time t det,rst the nrst output will be set logical ?low? and the TLE8457 will automatically enter init mode and start the initialization watchdog (see chapter 4.3.2 and chapter 4.4 ). figure 11 v cc undervoltage detection 4.3.2 reset output the nrst output is used for issuing re set pulses to for example an external microcontroller. in case of voltage regulator undervoltage or over-tempe rature events the nrst output will go ?low? and a mode transition to init mode will be triggered. the nrst output will stay ?low? until a complete recovery from the failure and additionally for the reset time t rst , then go ?high? (see figure 11 ). while the TLE8457 is in init mode and nrst is ?low? mo de transition to normal operation mode is blocked. the nrst pin is internally pulled up to v cc . if needed in the application, an additional external pull-up resistor can be implemented. TLE8457_vcc_undervoltage v cc,uv t rst t det,rst init mode normal operation mode (en = ?high) standby mode (en = ?low) normal operation mode (en = ?high) init mode (en = ?low) nrst goes and stays ?low as long as v cc is in undervoltage nrst stays ?low for additional reset time t rst nrst v cc t t data sheet 15 rev. 1.0 2016-08-05 TLE8457 lin transceiver with inte grated voltage regulator functional description 4.4 initialization watchdog the TLE8457 features an enhanced init ialization watchdog timer for dete ction of local fa ilures and error handling for minimizing system curr ent consumption. the bene fit of this safety function is to prevent a malfunctioning ecu being stuck in init mode with high current consumption and dr aining the car battery. the initialization watchdog is only active in init mode, with the two use cases: v cc supply initialization and normal operation mode activation. figure 12 initialization watchdog vcc supply initialization the v cc supply initialization watchdog is detecting if local errors on the ecu is preventing the v cc supply to power up correctly because of short circuits to ground or if components on the board are drawing too high currents. the timer is started when th e linear regulator is switched on after power-up events or after mode transitions to init mode triggered by either bus wake-up or the en input being set ?high? in sleep mode. additionally, the timer will start when detecting v cc undervoltage and after recove ry from an overtemperature event. TLE8457_watchdog v s,pon v cc v s v cc,uv v cc supply initialization t rst nrst normal operation mode activation init mode un-powered en normal operation mode watchdog 1 2 3 4 timeout 1 timeout 2 if timeout forced transition to sleep mode if timeout forced transition to sleep mode 1 v s exceeds the power-on reset threshold v cc supply initialization watchdog is started v cc exceeds the v cc -undervoltage threshold reset timer is started reset timer elapses normal operation mode activation watchdog is started mode change with the en input mode transition to normal mode txd must be ?high for at least t to,rec after entering normal mode for releasing the transmitter t to,rec 5 2 3 4 5 data sheet 16 rev. 1.0 2016-08-05 TLE8457 lin transceiver with inte grated voltage regulator functional description in case the v cc voltage rise above the v cc,uv undervoltage threshold before the timer elapses, v cc is considered successfully initialized and the timer is disabled. if the timer elapses before v cc powers up correctly, the TLE8457 will autonomously tr ansition to sleep mode. normal operation mode activation after the TLE8457 has ge nerated a reset pulse the initialization watchdog is started for monitoring the activation of normal operation mode. the microcontrol ler must set the en input ?high? before the timer elapses after t init_wd , else the TLE8457 will autonomous ly transition to sleep mode. figure 13 enable activation time-out TLE8457_initialization_timeout standby mode / sleep mode / unpowered en nrst t rst t t t sleep mode t init_wd init mode data sheet 17 rev. 1.0 2016-08-05 TLE8457 lin transceiver with inte grated voltage regulator functional description 4.5 lin transceiver the lin interface is a single wire, bi-directional bus, used for in-veh icle networks. the integrated lin transceiver of the TLE8457 is the interface between the microcontrol ler and the physical lin bus (see figure 18 ). data from the microcon troller is driven to the lin bus via th e txd input. the transmit data stream on the txd input is converted to a lin bus signal with optimized slew rates in order to minimize the electromagnetic emission of the lin network. the rxd output reads back the information from the lin bus to the microcontroller. the receiver has an integrated filter network for no ise suppression from the lin bus and to increase the electromagnetic i mmunity level of the transceiver. the lin specification defines two valid bus levels (see figure 14 ): ? dominant state with the lin bus voltage level near gnd, actively driven by a transceiver. ? recessive state with the lin bus volt age pulled up to the supply voltage v s through the bus termination. by setting the txd input of the tle 8457 to a logical ?low? signal, the tran sceiver generates a dominant level on the bus interface pin. the receiver reads back the sign al on the lin bus and indicates the dominant lin bus signal with a logical ?low? on the rxd output to the microcontroller. by setting the txd input ?high?, the transceiver sets the lin interface pin to the recessive level. at the same time the recessive level on the lin bus is indicated by a logical ?high? signal on the rxd output. every lin network consists of a ma ster node and one or more slave nodes. to configure the TLE8457 for master node applications, a termination resistor of 1 k ? and a diode must be connected between the lin bus and the power supply v s (see figure 18 ). figure 14 lin bus signals TLE8457_lin_communication_a t txd v cc bus v s recessive dominant recessive t t rxd v cc v th_rec v th_dom data sheet 18 rev. 1.0 2016-08-05 TLE8457 lin transceiver with inte grated voltage regulator functional description 4.5.1 txd time-out the txd time-out feature protects the lin bus against perm anent blocking in case the logical signal on the txd input is continuously ?low?, caused by for example a ma lfunctioning microcontroller or a short circuit on the printed circuit board. in normal operation mode, a logical ?low? signal on the txd input for time t > t txd disables the transmitter?s output driver stage (see figure 15 ). the receiver will remain active and the data on the bus are still monitored on the rxd output. the TLE8457 will release the output stage after a txd time-out even t first when detecting a logical ?high? signal on the respective txd input for the time t to,rec . figure 15 txd time-out 4.5.2 short circuit the bus pin of TLE8457 can withstand short circ uits to either gnd or to the power supply v s . the integrated over-temperature protection may disable the transmitte r if a permanent short circuit on the bus pin causes the TLE8457 to overheat. 4.6 over-temperature protection the TLE8457 has two independent over -temperature detectors for protec ting the device against thermal overstress; on the voltage regulato r pass element and on the lin bus transmitter. in case the junction temperature at the lin transmitter increa se above the thermal shut down level t jsd , it will be disabled until the transmitter?s junction te mperature cools down below t j < t jsd - ? t . no other effect nor mode change will occur. after a lin transmitter over-t emperature recovery the txd input requires a logical ?high? signal before restarting data transmission. if an over-temperature event is detected on the voltage regulator, it will be disabled and the nrst output will be set ?low?. during the over-tempe rature condition no functionality of the TLE8457 is avai lable. after the junction temperature cools down below t j < t jsd - ? t , the TLE8457 will automatically enter init mode and be reactivated. note: depending on the over-temperature circumstance, either only the lin transmitter will detect over- temperature, for example due to bu s short circuit or severe emc injection, only the voltage regulator detector or both (simultaneously or sequentially). TLE8457_txd_timeout_a t txd t to,rec t txd txd time-out due to e.g. microcontroller error release after txd time-out recovery of the microcontroller error t normal communication normal communication v bus data sheet 19 rev. 1.0 2016-08-05 TLE8457 lin transceiver with inte grated voltage regulator general product characteristics 5 general product characteristics 5.1 absolute maximum ratings notes 1. stresses above the ones listed he re may cause permanent damage to the device. exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2. integrated protection functions are designed to preven t ic destruction under fault conditions described in the data sheet. fault conditions are cons idered as ?outside? normal operatin g range. protection functions are not designed for continuous repetitive operation. table 3 absolute maximum ratings voltages, currents and temperatures 1) all voltages with respect to ground; positive cu rrent flowing into pin; unless otherwise specified 1) not subject to production test, specified by design parameter symbol values unit note or test condition number min. typ. max. voltage supply input voltage v s -0.3 ? 45 v lin spec 2.2a (par. 11) p_5.1.1 bus input voltage v bus -27 ? 40 v ? p_5.1.2 logic voltages at en and txd v logic,in -0.3 ? 7.0 v ? p_5.1.3 logic voltages at rxd and nrst v logic,out -0.3 ? v cc + 0.3 v? p_5.1.4 voltage regulator output v cc -0.3 ? 7.0 v ? p_5.1.5 currents output current at rxd i rxd -15 ? 15 ma ? p_5.1.6 output current at nrst i nrst ??10ma? p_5.1.7 temperature junction temperature t j -40 ? 150 c ? p_5.1.8 storage temperature t s -55 ? 150 c ? p_5.1.9 esd susceptibility electrostatic discharge voltage at v s and bus vs. gnd v esd -8 ? 8 kv human body model (100pf via 1.5 k ? ) 2) 2) esd susceptibility, hbm according to ansi/esda/jedec js-001 (1.5 k , 100pf) p_5.1.10 electrostatic discharge voltage all other pins v esd -2 ? 2 kv human body model (100pf via 1.5 k ? ) 2) p_5.1.11 electrostatic discharge voltage corner pins v esd -750 ? 750 v charged device model 3) 3) esd susceptibility, charged device model ?cdm? eia / jesd 22-c101 or esda stm5.3.1 p_5.1.12 electrostatic discharge voltage at all other pins v esd -500 ? 500 v charged device model 3) p_5.1.13 data sheet 20 rev. 1.0 2016-08-05 TLE8457 lin transceiver with inte grated voltage regulator general product characteristics 5.2 functional range note: within the functional range the ic operates as described in the circuit de scription. the electrical characteristics are specified within the conditions given in the related electrical characteristics table. table 4 operating range parameter symbol values unit note or test condition number min. typ. max. supply voltage supply voltage range for normal operation v s(nor) 5.5 ? 28 v lin spec 2.2a param. 10 p_5.2.12 extended supply voltage range for operation v s(ext) 3.0 ? 40 v parameter deviations possible p_5.2.22 stability requirement on vcc output capacitor range c vcc 1.0??f 1) , 3) 1) the minimum output capacitance requirement is applicable for a worst case capacitance tolerance of 30%. p_5.2.3 output capacitor esr esr(c vcc )? ? 5.0 ? 2) , 3) 2) relevant esr value at f = 10 khz. p_5.2.4 thermal parameter junction temperature t j -40 ? 150 c 3) 3) not subject to production test, specified by design. p_5.2.5 data sheet 21 rev. 1.0 2016-08-05 TLE8457 lin transceiver with inte grated voltage regulator general product characteristics 5.3 thermal characteristics note: this thermal data was generated in accord ance with jedec jesd51 standards. for more information, please visit www.jedec.org . table 5 thermal resistance 1) 1) not subject to production test, specified by design. parameter symbol values unit note or test condition number min. typ. max. thermal resistance, pg-d so-8 package version junction ambient r thja ? 130 ? k/w 2) 2) specified r thja value is according to jedec jesd51-2,-5,-7 at na tural convection on fr4 2s2p board; the product (chip+package) was simulated on a 76.2 x 114.3 x 1. 5 mm board with 2 inner copper layers (2 x 70 m cu, 2 x 35 m cu). where applicable a thermal via array under the ex posed pad contacted to the first inner copper layer. p_5.3.1 thermal resistance, pg-tson-8 package version junction ambient r thja ?60?k/w 2) p_5.3.2 junction ambient ? 190 ? k/w footprint only 3) 3) specified rthja value is according to jedec jesd51-3 at natural convecti on on fr4 1s0p board; the product (chip+package) was simulated on a 76.2 x 114.3 x 1. 5 mm board with 1 inner copper layer (1 x 70 m cu). p_5.3.5 junction ambient ? 70 ? k/w 300mm2 heatsink on pcb 3) p_5.3.6 thermal shutdown junction temperature thermal shutdown temperature t jsd 160 180 200 c t jsd increasing p_5.3.3 thermal shutdown hysteresis t ?10?k t jsd decreasing p_5.3.4 data sheet 22 rev. 1.0 2016-08-05 TLE8457 lin transceiver with inte grated voltage regulator electrical characteristics 6 electrical characteristics 6.1 functional device characteristics table 6 electrical characteristics 5.5 v < v s <28v; r lin = 500 ? ; -40 c < t j < 150c; all voltages with respect to ground; positive current flowing into pin 1) ; unless otherwise specified. parameter symbol values unit note or test condition number min. typ. max. current consumption current consumption at v s , transmitter in recessive state i s,rec 0.1 0.3 0.7 ma i cc = 50 a; without r lin ; txd = ?high?; v bus = v s p_6.1.1 current consumption at v s , transmitter in dominate state i s,dom 0.1 1.0 3.0 ma i cc = 50 a; without r lin ; txd = ?low?; v bus =0v p_6.1.2 current consumption at v s , dominate state i s,dom_max 70 71 73 ma i cc = 70 ma; without r lin ; txd = ?low?; v bus =0v p_6.1.3 current consumption at v s in standby mode i s,standby = i s - i cc i s,standby ?2040astandby mode; i cc =50a; v s = v bus = 13.5 v; p_6.1.4 current consumption at v s in sleep mode i s,sleep ? 7 16 a sleep mode; v s = 13.5 v; v bus =v s ; v cc =0v p_6.1.5 current consumption at v s in sleep mode. bus shorted to gnd i s,sc_gnd 250 ? 800 a sleep mode; v s = 13.5 v; v bus =0v; v cc =0v p_6.1.6 power-up / power-down power-on reset level on v s v s,pon ??3.0v? p_6.1.7 undervoltage threshold, v s on v s,uv,on 4.7 5.15 5.5 v rising edge p_6.1.8 undervoltage threshold, v s off v s,uv,off 4.4 4.85 5.2 v falling edge p_6.1.9 undervoltage hysteresis on v s v s,uv,hys = v s,uv,on - v s,uv,off v s,uv,hys 200 300 ? mv 2) p_6.1.10 undervoltage blanking time t blank,uv ?10?s 2) p_6.1.11 enable input: en high level input voltage v en,on 2??v? p_6.1.12 low level input voltage v en,off ??0.8v? p_6.1.13 input hysteresis v en,hys 50 200 ? mv ? p_6.1.14 pull-down resistance r en 15 30 60 k ? ? p_6.1.15 delay time for mode change, en ?low? t mode,low 10 ? 50 s ? p_6.1.16 delay time for mode change, en ?high? t mode,high ??5s 2) p_6.1.17 initialization watchdog time t init_wd 200 ? 1000 ms ? p_6.1.18 data sheet 23 rev. 1.0 2016-08-05 TLE8457 lin transceiver with inte grated voltage regulator electrical characteristics input capacitance ci en ?5?pf 2) p_6.1.83 reset output: nrst high level leakage current i nrst,h ??5a 2) p_6.1.19 low level output voltage v nrst ??0.4v i nrst = 1.5 ma; v cc >1v; p_6.1.20 reset time t rst 41016ms? p_6.1.21 internal pull-up resistance r nrst 51020k ? ? p_6.1.22 voltage regulator output, 5 v versions (TLE8457asj and TLE8457ale): vcc output voltage v cc 4.9 5.0 5.1 v 0.05 ma < i cc <70ma; 5.8 v < vs < 28 v p_6.1.23 output voltage drop v dr =v s -v cc 3) v dr ? 250 650 mv i cc <70ma p_6.1.24 output voltage drop, 50ma v dr =v s -v cc v dr,50 ? 180 480 mv i cc <50ma p_6.1.25 output voltage drop, 20ma v dr =v s -v cc v dr,20 ? 80 200 mv i cc <20ma p_6.1.26 output current limitation i cc,lim -150 ? -70 ma 0 v < v cc <4.8v p_6.1.27 load regulation ? v cc,lo ?2550mv0.05ma< i cc <70ma; vs = 13.5 v p_6.1.28 line regulation ? v cc,li ?2550mv i cc =1ma; 5.8 v < v s <28v p_6.1.29 power supply ripple rejection psrr 50 60 ? db 2) ; i cc = 50 ma; f = 100 hz; v r =0.5 v pp ; v s = 13.5 v p_6.1.30 undervoltage reset threshold v cc,uv 4.27 4.4 4.5 v v cc decreasing p_6.1.31 undervoltage reset hysteresis v cc,uv,hy 50 100 ? mv ? p_6.1.32 undervoltage detection time t det,rst 1?20s 2) ; v cc =3.5v c nrst =20pf p_6.1.33 voltage regulator output, 3.3 v versio ns (TLE8457bsj and TLE8457ble): vcc output voltage v cc 3.234 3.300 3.366 v 0.05 ma < i cc <70ma; 4.066 v < vs < 28 v p_6.1.34 output voltage drop v dr =v s -v cc v dr ? 380 770 mv i cc <70ma p_6.1.35 output voltage drop, 50ma v dr =v s -v cc v dr,50 ? 280 550 mv i cc <50ma p_6.1.36 output voltage drop, 20ma v dr =v s -v cc v dr,20 ? 110 220 mv i cc <20ma p_6.1.37 output current limitation i cc,lim -150 ? -70 ma 0 v < v cc <3.1v p_6.1.38 table 6 electrical characteristics (cont?d) 5.5 v < v s <28v; r lin = 500 ? ; -40 c < t j < 150c; all voltages with respect to ground; positive current flowing into pin 1) ; unless otherwise specified. parameter symbol values unit note or test condition number min. typ. max. data sheet 24 rev. 1.0 2016-08-05 TLE8457 lin transceiver with inte grated voltage regulator electrical characteristics load regulation ? v cc,lo ?2550mv0.05ma< i cc <70ma; v s = 13.5 v p_6.1.39 line regulation ? v cc,li ?2550mv i cc =1ma; 4.066 v < v s <28v p_6.1.40 power supply ripple rejection psrr 50 60 ? db 2) ; i cc = 50 ma; f = 100 hz; v r =0.5 v pp ; v s = 13.5 v p_6.1.41 undervoltage reset threshold v cc,uv 2.82 2.90 2.96 v v cc decreasing p_6.1.42 undervoltage reset hysteresis v cc,uv,hy 33 66 ? mv ? p_6.1.43 undervoltage detection time t det,rst 1?20s 2) ; v cc =2.31v c nrst =20pf p_6.1.44 receiver output: rxd high level output voltage v rxd,h 0.8 v cc ??v i rxd =-2ma; v bus = v s p_6.1.45 low level output voltage v rxd,l ? ? 0.2 v cc v i rxd =2ma; v bus =0v p_6.1.46 transmission input: txd high level input voltage range v txd,h 0.7 v cc ? ? v recessive state p_6.1.47 low level input voltage range v txd,l ? ? 0.3 v cc vdominant state p_6.1.48 input hysteresis v txd,hys 200 ? ? mv ? p_6.1.49 pull-up resistance r txd 15 30 60 k ? ? p_6.1.50 txd time-out t txd 81828ms? p_6.1.51 txd recessive release time t to,rec ??10s 2) p_6.1.52 input capacitance ci ? 5 ? pf 2) p_6.1.93 bus receiver: bus receiver threshold voltage, recessive to dominant edge v th_dom 0.4 v s 0.44 v s ?v v s < 18v; p_6.1.53 receiver dominant state v busdom -27 ? 0.4 v s v lin spec 2.2a (par. 17) 4) p_6.1.54 receiver threshold voltage, dominant to recessive edge v th_rec ? 0.56 v s 0.6 v s v v s < 18v; p_6.1.55 receiver recessive state v busrec 0.6 v s ? 40 v lin spec 2.2a (par. 18) 5) p_6.1.56 receiver center voltage v bus_cnt 0.475 v s 0.5 v s 0.525 v s v lin spec 2.2a (par. 19) 6) v s < 18v; p_6.1.57 table 6 electrical characteristics (cont?d) 5.5 v < v s <28v; r lin = 500 ? ; -40 c < t j < 150c; all voltages with respect to ground; positive current flowing into pin 1) ; unless otherwise specified. parameter symbol values unit note or test condition number min. typ. max. data sheet 25 rev. 1.0 2016-08-05 TLE8457 lin transceiver with inte grated voltage regulator electrical characteristics receiver hysteresis v hys 0.07 v s 0.12 v s 0.175 v s v lin spec 2.2a (par. 20) 7) v s < 18v; p_6.1.58 wake-up threshold voltage v bus,wk 0.4 v s 0.5 v s 0.6 v s v? p_6.1.59 bus transmitter: bus bus recessive output voltage v bus,ro 0.8 v s ?v s v txd = ?high?; open load p_6.1.60 bus short circuit current i bus_lim 40 85 125 ma v bus =18v; lin spec 2.2a (par. 12); p_6.1.61 leakage current i bus_no_gnd -1 -0.5 ? ma v s =0v; v bus =-12v; lin spec 2.2a (par. 15) p_6.1.62 leakage current i bus_no_bat ?15a v s =0v; v bus =18v; lin spec 2.2a (par. 16) p_6.1.63 leakage current i bus_pas_dom -1 -0.5 ? ma v s =18v; v bus =0v; lin spec 2.2a (par. 13) p_6.1.64 leakage current i bus_pas_rec ?15a v s =8v; v bus =18v; driver stage ?off?; txd = ?high?; lin spec 2.2a (par. 14) p_6.1.65 forward voltage serial diode v serdiode 0.4 ? 1.0 v i serdiode =-75a lin spec 2.2a (par.21) p_6.1.66 bus pull-up resistance r slave 20 40 60 k ? lin spec 2.2a (par. 26) p_6.1.67 bus dominant output voltage maximum load v bus,do ??1.4v v txd =0v; r lin = 500 ? ; v s =5.5 v; p_6.1.68 bus dominant output voltage maximum load v bus,do ??2.0v v txd =0v; r lin = 500 ? ; v s = 18 v; p_6.1.98 input capacitance ci bus ?30pf 2) p_6.1.95 dynamic transceiver characteristics: bus dominant time for bus wake- up t wk,bus 30 ? 150 s ? p_6.1.69 propagation delay: lin bus dominant to rxd low lin bus recessive to rxd high t rx_pdft t rx_pdr 1 1 3.5 3.5 6 6 s s lin spec 2.2a (par. 31) c rxd =20pf p_6.1.70 receiver delay symmetry t rx_sym -2 ? 2 s lin spec 2.2a (par. 32) t rx_sym = t rx_pdf - t rx_pdr ; c rxd =20pf p_6.1.71 table 6 electrical characteristics (cont?d) 5.5 v < v s <28v; r lin = 500 ? ; -40 c < t j < 150c; all voltages with respect to ground; positive current flowing into pin 1) ; unless otherwise specified. parameter symbol values unit note or test condition number min. typ. max. data sheet 26 rev. 1.0 2016-08-05 TLE8457 lin transceiver with inte grated voltage regulator electrical characteristics duty cycle d1 (for worst case at 20 kbit/s) d1 = t bus_rec(min) /2 t bit d1 0.396 ? ? duty cycle 1 8) th rec (max) = 0.744 v s ; th dom (max) =0.581 v s ; v s = 7.0 ? 18 v; t bi =50s; lin spec 2.2a (par. 27) p_6.1.72 duty cycle d1 v s supply 5.5 v to 7.0 v (for worst case at 20 kbit/s) d1 = t bus_rec(min) /2t bit d1 0.396 ? ? duty cycle 1 8) th rec (max) = 0.760 v s ; th dom (max) = 0.593 v s ; 5.5 v < v s <7.0v; t bit =50s p_6.1.73 duty cycle d2 (for worst case at 20 kbit/s) d2 = t bus_rec(max) /2t bit d2 ? ? 0.581 duty cycle 2 8) th rec (min)= 0.422 v s ; th dom (min)= 0.284 v s ; v s = 7.6 ? 18 v; t bit =50s; lin spec 2.2a (par. 28) p_6.1.74 duty cycle d2 v s supply 6.1 v to 7.6 v (for worst case at 20 kbit/s) d2 = t bus_rec(max) /2t bit d2 ? ? 0.581 duty cycle 2 8) th rec (min)= 0.41 v s ; th dom (min)= 0.275 v s ; 6.1 v < v s <7.6v; t bit =50s; p_6.1.75 duty cycle d3 v s supply 7.0 v to 18.0 v (for worst case at 10.4 kbit/s) d3 = t bus_rec(min) /2t bit d3 0.417 ? ? duty cycle 3 8) th rec (max) = 0.778 v s ; th dom (max) =0.616 v s ; v s = 7.0 ? 18 v; t bit =96s; lin spec 2.2a (par. 29) p_6.1.76 duty cycle d3 v s supply 5.5 v to 7.0 v (for worst case at 10.4 kbit/s) d3 = t bus_rec(min) /2t bit d3 0.417 ? ? duty cycle 3 8) th rec (max) = 0.797 v s ; th dom (max) = 0.630 v s ; 5.5 v < v s <7.0v; t bit =96s; p_6.1.77 table 6 electrical characteristics (cont?d) 5.5 v < v s <28v; r lin = 500 ? ; -40 c < t j < 150c; all voltages with respect to ground; positive current flowing into pin 1) ; unless otherwise specified. parameter symbol values unit note or test condition number min. typ. max. data sheet 27 rev. 1.0 2016-08-05 TLE8457 lin transceiver with inte grated voltage regulator electrical characteristics duty cycle d4 v s supply 7.6 v to 18.0 v (for worst case at 10.4 kbit/s) d4 = t bus_rec(max) /2t bit d4 ? ? 0.590 duty cycle 4 8) th rec (min) = 0.389 v s ; th dom (min) = 0.251 v s ; v s = 7.6 ? 18 v; t bit =96s; lin spec 2.2a (par. 30) p_6.1.78 duty cycle d4 v s supply 6.1 v to 7.6 v (for worst case at 10.4 kbit/s) d4 = t bus_rec(max) / 2 t bit d4 ? ? 0.590 duty cycle 4 8) th rec (min) = 0.378 v s ; th dom (min)= 0.242 v s ; 6.1 v < v s <7.6v; t bit =96s; p_6.1.79 1) load current on vcc specified positive direction out of pin. 2) not subject to production test, specified by design. 3) measured when the output voltage vcc has dropped 100 mv from the nominal value obtained at vs = 13.5v 4) minimum limit specified by design. 5) maximum limit specified by design. 6) v bus_cnt =(v th_dom +v th rec )/2; . 7) v hys =v th_rec -v th_dom . 8) bus load according to lin spec 2.2a: load 1 = 1 nf / 1 k ? = c bus / r lin load 2 = 6.8 nf / 660 ? = c bus / r lin load 3 = 10 nf / 500 ? = c bus / r lin table 6 electrical characteristics (cont?d) 5.5 v < v s <28v; r lin = 500 ? ; -40 c < t j < 150c; all voltages with respect to ground; positive current flowing into pin 1) ; unless otherwise specified. parameter symbol values unit note or test condition number min. typ. max. data sheet 28 rev. 1.0 2016-08-05 TLE8457 lin transceiver with inte grated voltage regulator electrical characteristics 6.2 diagrams figure 16 simplified test circuit for dynamic transceiver characteristics figure 17 timing diagram for dy namic transceiver characteristics TLE8457_test_circuit_a gnd bus r lin v cc rxd 100 nf v s c bus txd c rxd nrst en c vcc c nrst TLE8457_lin_timing_diagram_a duty cycle d1, d3 = t bus_rec(min) / (2 x t bit ) duty cycle d2, d4 = t bus_rec(max) / (2 x t bit ) t bit t bit t bit t bus_dom(max) t bus_rec(min) thresholds of receiving node 1 th rec(max) th dom(max) th rec(min) th dom(min) t bus_dom(min) t bus_rec(max) t rx_pdf(1) t rx_pdr(1) t rx_pdf(2) t rx_pdr(2) v sup (transceiver supply of transmitting node) txd (input to transmitting node) rxd (output of receiving node 2) rxd (output of receiving node 1) thresholds of receiving node 2 data sheet 29 rev. 1.0 2016-08-05 TLE8457 lin transceiver with inte grated voltage regulator application information 7 application information note: the following information is given as a hint for the implementation of the device only and shall not be regarded as a description or wa rranty of a certain func tionality, condition or quality of the device. 7.1 application example figure 18 simplified application circuit tle7258 gnd micro controller e.g xc22xx v s v bat lin bus master node bus tle42xx 22f 100nf 1nf 5 v or 3.3v ecu_1 pull-up to mcu supply 2.4k 1 2 4 5 78 6 1f 100nf v q gnd inh v i 1k inh rxd txd en gnd v cc 100nf TLE8457 gnd micro controller e.g xc22xx v s slave node bus 22f 100nf 220pf ecu_x 5 2 6 3 8 4 1f 100nf v cc rxd txd en gnd v cc 1 7 nrst data sheet 30 rev. 1.0 2016-08-05 TLE8457 lin transceiver with inte grated voltage regulator application information 7.2 esd robustness acco rding to iec61000-4-2 test for esd robustness according to iec61000-4-2 (150 pf, 330 ? ) have been performed. the results and test conditions are available in a separate test report. 7.3 transient robustness according to iso 7637-2 test for transient robustness accord ing to iso 7637-2 have been performe d. the results and test conditions are available in a separate test report. 7.4 lin physical layer compatibility as the lin physical layer is independent from higher lin layers (for example lin prot ocol layer), all nodes with a lin physical layer according to this revision can be mixed with lin physi cal layer nodes, which are according to older revisions (lin 1.0, lin 1.1, lin 1.2, lin 1.3, lin 2.0, lin 2.1 and lin 2.2), without any restrictions. table 7 esd robustness according to iec61000-4-2 performed test results unit remarks electrostatic discharge voltage at pin v s , bus versus gnd +8 kv 1) positive pulse 1) esd susceptibility according lin emc 1.3 test specification, section 4.3. (iec 61000-4-2) - tested by external test house. electrostatic discharge voltage at pin v s , bus versus gnd -8 kv 1) negative pulse table 8 automotive transient ro bustness according to iso 7637-2 performed test results unit pulse 1 -100 v pulse 2 +75 v pulse 3a -150 v pulse 3b +100 v data sheet 31 rev. 1.0 2016-08-05 TLE8457 lin transceiver with inte grated voltage regulator package outlines 8 package outlines figure 19 pg-dso-8 (plastic dual smal l outline pg-dso-8) figure 20 pg-tson-8 (plastic thin small outl ine nonleaded pg-tson-8) green product (rohs compliant) to meet the world-wide customer requirements for en vironmentally friendly products and to be compliant with government regulations the device is available as a green product. green products are rohs-compliant (i.e pb-free finish on leads and suitable for pb -free soldering according to ipc/jedec j-std-020). +0.06 0.19 0.35 x 45? 1) -0.2 4 c 8 max. 0.64 ?.2 6 ?.25 0.2 8x m c 1.27 +0.1 0.41 0.2 m a -0.06 1.75 max. (1.45) ?.07 0.175 b 8x b 2) index marking 5 -0.2 1) 4 1 85 a 1) does not include plastic or metal protrusion of 0.15 max. per side 2) lead width can be 0.61 max. in dambar area gps01181 0.1 0.1 0.4 pin 1 marking pin 1 marking pg-tson-8-1-po v01 0.1 0.2 0.1 0.25 0.81 0.1 2.4 0.1 0.1 0.1 0.3 0.1 0.38 0.1 0.3 0.1 0.65 0.1 3 0.1 3 0.1 0 +0.05 1 0.1 0.56 0.1 1.63 0.1 1.58 0.1 0.05 0.07 min. z (4:1) z for further info rmation on alternative pa ckages, please visit our website: http://www.infineon.com/packages . dimensions in mm data sheet 32 rev. 1.0 2016-08-05 TLE8457 lin transceiver with inte grated voltage regulator revision history 9 revision history table 9 revision history revision data changes 1.0 2016-08-05 data sheet created trademarks of infineon technologies ag hvic?, ipm?, pfc?, au-convertir?, aurix? , c166?, canpak?, cipos?, cipurse?, cooldp ?, coolgan?, coolir?, coolmos?, coolset?, coolsic?, dave?, di-pol?, directfet?, drblade?, easypim?, econobridge?, ec onodual?, econopack?, econopim?, eicedriver?, eupec?, fcos?, ga npowir?, hexfet?, hitfet?, hybridpack?, imotion?, iram?, isoface?, isopack?, ledrivir?, li tix?, mipaq?, modstack?, my-d?, novalithic?, o ptiga?, optimos?, origa?, powiraudio?, powirstage?, primepack?, primestack?, pr ofet?, pro-sil?, rasic?, real 3?, smartlewis?, solid flas h?, spoc?, strongirfet?, supirbuck?, tempfet?, trenchstop?, tricore?, uhvic?, xhp?, xmc?. trademarks updated november 2015 other trademarks all referenced product or service names and trademarks are the proper ty of their respective owners. edition 2016-08-05 published by infineon technologies ag 81726 munich, germany ? 2016 infineon technologies ag. all rights reserved. do you have a question about any aspect of this document? email: erratum@infineon.com important notice the information given in this document shall in no event be regarded as a guarantee of conditions or characteristics ("beschaffenheitsgarantie"). with respect to any examples, hints or any typical values stated herein and/or any information regarding the application of the product, infineon technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation warranties of non-infringement of intellectual property rights of any third party. in addition, any information given in this document is subject to customer's comp liance with its obligations stated in this document and any applicable legal requirements, norms and standards concerning customer's products and any use of the product of infineon technologies in customer's applications. the data contained in this document is exclusively intended for technically trained staff. it is the responsibility of customer's technical departments to evaluate the suitability of the product for the intended application and the completeness of the product information given in this document with respect to such application. for further information on technology, delivery terms and conditions and prices, please contact the nearest infineon technologies office ( www.infineon.com ). warnings due to technical requirements products may contain dangerous substances. for information on the types in question please contact your nearest infineon technologies office. except as otherwise explicitly approved by infineon technologies in a written document signed by authorized representatives of infineon technologies, infineon technologies? products may not be used in any applications where a failure of the product or any consequences of the use thereof can reasonably be expected to result in personal injury. please read the important notice and warnings at the end of this document |
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